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PID#253461434A (AMD)
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| Process Node | TSMC 3nm/6nm FinFET |
|---|---|
| Multi Instance Support | Up to 8 @ 36 GB |
| Tdp W | 1400 |
| Peak Engine Clock Mhz | 2400 |
| Gpu Compute Units | 256 |
| Architecture | CDNA |
| Gpu Memory Gb | 288 |
| Fp16 Bf16 Tflops Dense | 2516.6 |
| Memory Bandwidth Tb S | 8 |
| Fp8 Tflops Dense | 5033.2 |
| Fp32 Tflops | 157.3 |
| Int8 Tops Dense | 5033.2 |
| Memory Bus Width Bits | 8192 |
| Accelerator Form Factor | OAM |
| Host Interface | 1 PCIe® Gen 5 x16 (128 GB/s) |
| Memory Type | HBM3E |
| Fp16 Bf16 Tflops Sparse | 5033.2 |
| Amd Infinity Cache Last Level | |
| Fp4 Tflops Dense | |
| Fp64 Tflops | |
| Fp8 Tflops Sparse | |
| Int8 Tops Sparse |
| Matrix Cores |
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| Media Engines |
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| Product Name |
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| Ras Features |
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| Stream Processors |
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| SKU | PID#253461434A |
|---|
| Product family / Series | |
|---|---|
| FP16 VECTOR | |
| MXFP6 | |
| I/O DIES (IODS) | |
| SCALE-UP AMD INFINITY FABRIC™ LINKS | |
| 8-GPU platform baseboard | |
| Minimum server design size (8-GPU platform) | |
| Multi-chip architecture process technology | |
| Accelerated compute dies (XCDs) per OAM module | |
| Compute units (CUs) per XCD | |
| L1 cache per CU | |
| Shared L2 cache per XCD | |
| AMD Infinity Cache™ shared across XCDs | |
| Supported decoders | |
| JPEG/MPEG CODEC per decoder | |
| Memory (multi-chip architecture) | |
| SR-IOV partitions | |
| Coherent shared memory bandwidth between GPUs | |
| Memory coherency | |
| Security features | |
| Virtualization / multitenancy | |
| GPU-to-GPU link security | |
| Networking support | |
| Software stack | |
| Supported frameworks | |
| Orchestration / deployment | |
| Document / part number | |
| Copyright |
