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232405395-D (AMD)
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| Process Node | 5nm FinFET / 6nm FinFET |
|---|---|
| Tdp W | 750 |
| Peak Engine Clock Mhz | 2100 |
| Gpu Compute Units | 2432 |
| Architecture | CDNA |
| Gpu Memory Gb | 192 |
| Interconnect | 7x 128 GB/s per GPU |
| Memory Bus Width Bits | 8192 |
| Accelerator Form Factor | UBB |
| Memory Type | HBM3 |
| Amd Infinity Cache Last Level | |
| Matrix Cores | |
| Media Engines | |
| Product Name | |
| Ras Features | |
| Software Platform | |
| Sr Iov Support |
| Stream Processors |
|---|
| System Total Memory Gb |
|---|
| SKU | 232405395-D |
|---|
| Product title | |
|---|---|
| Tagline | |
| AI peak theoretical FP8 with sparsity | |
| HPC peak theoretical FP32 precision | |
| Baseboard platform | |
| Total HBM3 memory | |
| Host I/O connections | |
| TF32 | |
| FP16 | |
| BFLOAT16 | |
| INT8 | |
| FP8 | |
| FP64 vector | |
| FP32 vector | |
| FP64 matrix | |
| FP32 matrix | |
| Decoder footnote | |
| Active interposer dies (AIDs) | |
| Memory bandwidth | |
| Memory clock | |
| Ring of 8 aggregate bandwidth | |
| Scale-out network bandwidth | |
| OAM count | |
| Inter-GPU link bandwidth | |
| Links per MI300X | |
| Per-module HBM3 memory | |
| Infinity architecture generation | |
| Per-GPU HBM3 capacity (interconnects section) | |
| Peak local bandwidth | |
| Infinity Cache (shared) | |
| Peak aggregate bidirectional Infinity Fabric bandwidth | |
| Diagram callout - Universal Baseboard Connectors | |
| Diagram callout - OAM Accelerators | |
| Diagram callout - Infinity Fabric Connectivity | |
| Diagram callout - PCIe I/O connectivity | |
| Diagram callout - per-OAM memory | |
| Supported AI/ML frameworks | |
| Copyright / trademark notice |
