Loading the catalog…
HMA82GR7CJR8N-UH/VK/WM/XN (SK hynix)
Blurred values are subscriber-only. Sign in to start a free trial — 2 full pages a day — or subscribe for unlimited access.
| Capacity Gb | 16 |
|---|---|
| Rank Organization | 16GB(2Rx8) |
| Ecc | Supports ECC error correction and detection |
| Memory Class | rdimm |
| Registered | true |
| Voltage Vdd V | 1.2 |
| Memory Generation | ddr4 |
| Product Name | DDR4 SDRAM Registered DIMM Based on 8Gb C-die |
| Height Mm | 31.25±0.15 |
| Bank Address In A Bg | |
| Bg Address | |
| Ca Parity | |
| Column Address | |
| Component Composition | |
| Corner Radius | |
| Data Transfer Rates | |
| Document Revision |
| General Tolerance Note |
|---|
| Idd0 |
|---|
| Idd0a |
|---|
| Idd1 |
|---|
| Idd1a |
|---|
| Idd2n |
|---|
| Idd2na |
|---|
| Idd2nd |
|---|
| Idd2ng |
|---|
| Idd2nl |
|---|
| Idd2np |
|---|
| Idd2nt |
|---|
| Idd2p |
|---|
| Idd2q |
|---|
| Idd3n |
|---|
| Idd3na |
|---|
| Idd3p |
|---|
| Idd4r |
|---|
| Idd4ra |
|---|
| Idd4w |
|---|
| Idd4wa |
|---|
| Idd4wc |
|---|
| Idd4wp |
|---|
| Idd5b |
|---|
| Idd5f2 |
|---|
| Idd5f4 |
|---|
| Idd6a |
|---|
| Idd6e |
|---|
| Idd6n |
|---|
| Idd6r |
|---|
| Idd7 |
|---|
| Idd8 |
|---|
| Internal Banks |
|---|
| Ipp0 |
|---|
| Ipp1 |
|---|
| Ipp2n |
|---|
| Ipp2p |
|---|
| Ipp3n |
|---|
| Ipp3p |
|---|
| Ipp4r |
|---|
| Ipp4w |
|---|
| Ipp5f2 |
|---|
| Ipp5f4 |
|---|
| Ipp6a |
|---|
| Ipp6e |
|---|
| Ipp6n |
|---|
| Ipp6r |
|---|
| Ipp7 |
|---|
| Ipp8 |
|---|
| Of Bank Groups |
|---|
| Of Ranks |
|---|
| Pin Number Callout |
|---|
| Pre Fetch |
|---|
| Product Type |
|---|
| Row Address |
|---|
| Temperature Sensor |
|---|
| Units |
|---|
| Vddq |
|---|
| Vddspd |
|---|
| Voltage Vpp V |
|---|
| Write Crc |
|---|
| SKU | HMA82GR7CJR8N-UH/VK/WM/XN |
|---|
| Organization | |
|---|---|
| Page size | |
| Power Supply VDD | |
| Burst Length | |
| On-Die Termination | |
| RoHS | |
| DBI | |
| Application | |
| IDD4RB | |
| IDD4WB | |
| IPP5B | |
| Front overall length (max) | |
| Front length | |
| Edge offset | |
| Notch/key vertical dimension | |
| Bottom edge dimension | |
| Pin 1 horizontal offset | |
| Dimension to first key/notch | |
| Center notch span (left) | |
| Center notch span (right) | |
| Right-end dimension | |
| Right-edge vertical dimension | |
| Right-end stacked dimension | |
| Module thickness (max) | |
| PCB thickness (max) | |
| Contact pitch | |
| Contact width | |
| Contact height | |
| Plating/keep-out dimension (max) | |
| Edge dimension (max) | |
| Gap dimension (max) | |
| Keep-out area note | |
| Contact start pin | |
| Contact end pin | |
| Contact group height (left) | |
| Contact group height (right) | |
| Contact group width (inner) | |
| Contact group width (outer) | |
| Key/notch width | |
| Edge dimension | |
| Notch chamfer dimension | |
| Overall detail width | |
| Revision | |
| Form factor / pin count | |
| Product title | |
| Part number (listed on title page) | |
| Description | |
| Compliance | |
| Bank grouping | |
| Data strobe | |
| Temperature sensor / SPD | |
| RoHS compliance | |
| Per DRAM Addressability | |
| Internal Vref DQ | |
| Address Table column header | |
| Key Parameters speed bin DDR4-1600 (-PB) | |
| Key Parameters speed bin DDR4-1866 (-RD) | |
| Key Parameters speed bin DDR4-2133 (-TF) | |
| Key Parameters speed bin DDR4-2400 (-UH) | |
| Key Parameters speed bin DDR4-2666 (-VK) | |
| Key Parameters speed bin DDR4-2933 (-WM) | |
| Key Parameters speed bin DDR4-3200 (-XN) | |
| Downbinning note | |
| Block diagram title (page 1) | |
| Block diagram title (page 2) | |
| Module organization | |
| SDRAM device count | |
| Data byte lanes (DQ/DQS) | |
| Data bus inversion / data mask signals | |
| ZQ calibration resistor present | |
| ZQ resistor value | |
| Default resistor value (page 1) | |
| Net structure note – command/address/control bus resistors | |
| TEN pin connection | |
| VDD / VDDSPD RCD connection | |
| Power rails shown | |
| Serial PD / SPD with thermal sensor | |
| SPD pull-up resistor | |
| RCD (Registering Clock Driver) present | |
| Command / address / control signals (RCD inputs) | |
| Address bus width | |
| Bank group / bank address | |
| RCD output clock distribution (Y outputs) | |
| ALERT_n routing | |
| RESET_n routing | |
| Parity routing | |
| CK0 termination | |
| CK1 termination | |
| Default resistor value (page 2) | |
| capacity | |
| organization | |
| page title | |
| revision | |
| revision date | |
| page number | |
| default tolerance note | |
| overall length (outer dimension) | |
| length (PCB / inner dimension) | |
| dimension | |
| dimension to Detail B feature | |
| dimension to right key | |
| height (overall) | |
| height (PCB) | |
| component label | |
| back-side height dimension | |
| side view thickness | |
| side view overall thickness | |
| contact pitch / dimension | |
| contact width | |
| non-metalized keep-out area note | |
| keep-out max dimension | |
| detail callout label |
