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Intel Xeon 6700/6500-series processors with Performance-cores (P-cores) (Intel)
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| Product family | Intel Xeon 6700/6500-series processors with Performance-cores (P-cores) |
|---|---|
| SKU | INTEL XEON 6700/6500-SERIES WITH P-CORES |
| Cores | 86 |
|---|---|
| Pcie Lanes | 50 |
| L3 Cache Mb | 336 |
| Memory Type | Gen 3 DDR5 Multiplexed Rank DIMMs (MRDIMMs) |
| Base Frequency Thread Isa | Intel Advanced Vector Extensions 512 (Intel AVX-512) |
| Max Memory Speed Mt S | 6400 |
| Product Name | Intel Xeon 6700/6500-Series Processors with P-Cores |
| Designed for | |
|---|---|
| Intel AMX INT8 floating point operations per cycle per core | |
| Intel AMX BF16/FP16 floating point operations per cycle per core | |
| Intel AMX supported data formats | |
| Recommended AI host CPU SKUs |
| MRDIMM memory bandwidth advantage vs RDIMMs |
|---|
| MRDIMM expected data-transfer rate |
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| DDR5 high-speed memory support |
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| Maximum cores per socket |
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| Socket scalability |
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| Maximum L3 cache per processor |
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| Confidential computing technology |
|---|
| Server consolidation ratio |
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| Average TCO gain vs 2nd Gen Intel Xeon Scalable |
|---|
| Single-socket PCIe lanes/socket advantage vs multi-socket |
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| 1S 6741P performance-per-dollar gain vs 1S AMD EPYC 9455 |
|---|
| Maximum cores in a single socket |
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| Maximum socket support |
|---|
| Memory channels |
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| MRDIMM memory speed |
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| MRDIMM additional memory bandwidth vs standard DDR5 DIMMs |
|---|
| Intel Flat Memory Mode |
|---|
| CXL 2.0 lanes |
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| CXL 2.0 data-transfer rate per lane |
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| CXL device type support |
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| Intel UPI 2.0 inter-socket bandwidth |
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| Intel UPI 2.0 bandwidth increase vs prior generation |
|---|
| PCIe 5.0 lanes (two-socket server) |
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| PCIe 5.0 lanes (one-socket server) |
|---|
| Intel AMX MAC operations vs AVX-512 |
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| Intel AVX-512 FMA units per core |
|---|
| Intel QuickAssist Technology (Intel QAT) |
|---|
| Intel Data Streaming Accelerator (Intel DSA) 2.0 |
|---|
| Intel In-Memory Analytics Accelerator (Intel IAA) 2.0 |
|---|
| Intel Dynamic Load Balancer (Intel DLB) |
|---|
| Intel TDX version 2 encryption keys per CPU |
|---|
| Security certification |
|---|
| Performance: ResNet-50 batch inference (INT8) vs AMD EPYC |
|---|
| Performance: CDN video-on-demand vs prior generations |
|---|
| Performance: average gain across broad workloads vs previous generation |
|---|
| Performance: HPC 4S vs 2S configuration |
|---|
| Performance: IBM Db2 BDI query throughput vs prior generations |
|---|
| Performance: HPCG with MRDIMMs vs previous generation |
|---|
| Performance: TCO reduction vs AMD EPYC (new DC deployments) |
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| Performance: server consolidation at maintained performance |
|---|
| PCIe lanes per socket (single-socket variant) |
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| Document number |
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