Loading the catalog…
HMAA4GR7CJR8N (SK hynix)
Blurred values are subscriber-only. Sign in to start a free trial — 2 full pages a day — or subscribe for unlimited access.
| Memory Class | rdimm |
|---|---|
| Die Density Gb | 16 |
| Registered | true |
| Pin Count | 288 |
| Memory Generation | ddr4 |
| Capacity Gb | 32 |
| Rank Organization | 32GB(2RX8) |
| Ecc | Supports ECC error correction and detection |
| Speed Mt S | 1600 |
| Voltage Vdd V | 1.2 |
| Product Name | DDR4 SDRAM Registered DIMM Based on 16Gb C-die |
| Height Mm | 30.75 |
| Bank Address In A Bg | |
| Bg Address | |
| Ca Parity | |
| Cl Nrcd Nrp | |
| Cl Trcd Trp | |
| Column Address | |
| Component Composition |
| Corner Radius |
|---|
| Data Transfer Rates |
|---|
| Die Type |
|---|
| Document Revision |
|---|
| Idd0 |
|---|
| Idd0a |
|---|
| Idd1 |
|---|
| Idd1a |
|---|
| Idd2n |
|---|
| Idd2na |
|---|
| Idd2nd |
|---|
| Idd2ng |
|---|
| Idd2nl |
|---|
| Idd2np |
|---|
| Idd2nt |
|---|
| Idd2p |
|---|
| Idd2q |
|---|
| Idd3n |
|---|
| Idd3na |
|---|
| Idd3p |
|---|
| Idd4r |
|---|
| Idd4ra |
|---|
| Idd4w |
|---|
| Idd4wa |
|---|
| Idd4wc |
|---|
| Idd4wp |
|---|
| Idd5b |
|---|
| Idd5f2 |
|---|
| Idd5f4 |
|---|
| Idd6a |
|---|
| Idd6e |
|---|
| Idd6n |
|---|
| Idd6r |
|---|
| Idd7 |
|---|
| Idd8 |
|---|
| Internal Banks |
|---|
| Ipp0 |
|---|
| Ipp1 |
|---|
| Ipp2n |
|---|
| Ipp2p |
|---|
| Ipp3n |
|---|
| Ipp3p |
|---|
| Ipp4r |
|---|
| Ipp4w |
|---|
| Ipp5f2 |
|---|
| Ipp5f4 |
|---|
| Ipp6a |
|---|
| Ipp6e |
|---|
| Ipp6n |
|---|
| Ipp6r |
|---|
| Ipp7 |
|---|
| Ipp8 |
|---|
| Of Bank Groups |
|---|
| Of Ranks |
|---|
| Pin Number Callout |
|---|
| Pre Fetch |
|---|
| Product Type |
|---|
| Row Address |
|---|
| Tck |
|---|
| Temperature Sensor |
|---|
| Units |
|---|
| Vddq |
|---|
| Vddspd |
|---|
| Voltage Vpp V |
|---|
| Write Crc |
|---|
| SKU | HMAA4GR7CJR8N |
|---|
| Operating temp min (°C) | 0 |
|---|---|
| Operating temp max (°C) | 85 |
| Die / process base | |
|---|---|
| Document date | |
| Manufacturer | |
| Configuration / Density | |
| Rank Address | |
| Page size | |
| Downbinning note | |
| VDD Supply Voltage | |
| VPP Supply Voltage (SDRAM Activating Power Supply) | |
| VTT Supply | |
| 12V Supply | |
| VDDSPD Supply | |
| VREFCA Supply | |
| PC4 VDD Note | |
| VSS Supply | |
| Memory Data Bus | |
| ECC Check Bits | |
| RESET_n Operating Voltage Note | |
| Net structure diagram title (page 1) | |
| Module organization | |
| SDRAM count on module | |
| CK0 termination | |
| CK1 termination | |
| Default resistor value (page 1) | |
| Address/Command/Control bus signals (register inputs) | |
| RC register output routing - CKE1 | |
| RC register output routing - ODT1 | |
| RC register output routing - CS1_n | |
| RC register output routing - ALERT_n | |
| RC register output routing - BG[1:0] | |
| RC register output routing - CKE0 | |
| RC register output routing - A[16:0] | |
| RC register output routing - ODT0 | |
| RC register output routing - CS0_n | |
| RC register output routing - PARITY | |
| RC register output routing - BA[1:0] | |
| RC register output routing - ACT_n | |
| RC register output routing - RESET_n | |
| RC register clock output routing - Y0 | |
| RC register clock output routing - Y1 | |
| RC register clock output routing - Y2 | |
| RC register clock output routing - Y3 | |
| Net structure diagram title (page 2) | |
| Default resistor value (page 2) | |
| Command/address/control resistor reference | |
| ZQ resistor value | |
| TEN pin connection | |
| VDD / VDDSPD RCD connection | |
| Data byte lane mapping - CB[7:0] | |
| Data byte lane mapping - DQ[31:24] | |
| Data byte lane mapping - DQ[23:16] | |
| Data byte lane mapping - DQ[15:8] | |
| Data byte lane mapping - DQ[7:0] | |
| Data byte lane mapping - DQ[39:32] | |
| Data byte lane mapping - DQ[47:40] | |
| Data byte lane mapping - DQ[55:48] | |
| Data byte lane mapping - DQ[59:56] | |
| Per-SDRAM data net (x8) | |
| Power/reference rails | |
| Serial PD / SPD device | |
| SPD bus pull-up resistor | |
| VDD - Voltage on VDD pin relative to Vss | |
| VDDQ - Voltage on VDDQ pin relative to Vss | |
| VPP - Voltage on VPP pin relative to Vss | |
| VIN, VOUT - Voltage on any pin except VREFCA relative to Vss | |
| TSTG - Storage Temperature | |
| TOPER - Normal Operating Temperature Range | |
| TOPER - Extended Temperature Range | |
| VDD - Supply Voltage | |
| VDDQ - Supply Voltage for Output | |
| VPP - Supply Voltage for DRAM Activating | |
| VIH.CA(DC75) DC input logic high | |
| VIL.CA(DC75) DC input logic low | |
| VIH.CA(AC100) AC input logic high | |
| VIL.CA(AC100) AC input logic low | |
| VREFCA(DC) Reference Voltage for ADD, CMD inputs | |
| VIHdiff differential input high | |
| VILdiff differential input low | |
| tDVAC for CK_t - CK_c @ |VIH/Ldiff(AC)|=200mV (min) | |
| VSEH Single-ended high-level for CK_t, CK_c | |
| VSEL Single-ended low-level for CK_t, CK_c | |
| Maximum peak amplitude above VDD Absolute Max allowed for overshoot area (Addr/Cmd/Ctrl) | |
| Delta value between VDD Absolute Max and VDD Max allowed for overshoot area (Addr/Cmd/Ctrl) | |
| Maximum peak amplitude allowed for undershoot area (Addr/Cmd/Ctrl) | |
| Maximum overshoot area per 1tCK Above Absolute Max (Addr/Cmd/Ctrl) | |
| Maximum overshoot area per 1tCK Between Absolute Max and VDD Max (Addr/Cmd/Ctrl) | |
| Maximum undershoot area per 1tCK Below VSS (Addr/Cmd/Ctrl) | |
| Maximum peak amplitude above VDD Absolute Max allowed for overshoot area (Clock) | |
| Delta value between VDD Absolute Max and VDD Max allowed for overshoot area (Clock) | |
| Maximum peak amplitude allowed for undershoot area (Clock) | |
| Maximum overshoot area per 1UI Above Absolute Max (Clock) | |
| Maximum overshoot area per 1UI Between Absolute Max and VDD Max (Clock) | |
| Maximum undershoot area per 1UI Below VSS (Clock) | |
| Maximum peak amplitude above Max absolute level of Vin,Vout (DQ/DQS/DM) | |
| Overshoot area Between Max Absolute level of Vin,Vout and VDDQ Max | |
| Undershoot area Between Min absolute level of Vin,Vout and VDDQ Max | |
| Maximum peak amplitude below Min absolute level of Vin,Vout | |
| Maximum overshoot area per 1UI Above Max absolute level of Vin,Vout | |
| Maximum overshoot area per 1UI Between Max absolute level of Vin,Vout and VDDQ Max | |
| Maximum undershoot area per 1UI Between Min absolute level of Vin,Vout and VSSQ | |
| Maximum undershoot area per 1UI Below Min absolute level of Vin,Vout | |
| VIX(CK) Differential Input Cross Point Voltage relative to VDD/2 for CK_t, CK_c | |
| VIX(CK) intermediate min limit (area dependent) | |
| VIX(CK) intermediate max limit (area dependent) | |
| VIH(AC)_RESET AC Input High Voltage | |
| VIH(DC)_RESET DC Input High Voltage | |
| VIL(DC)_RESET DC Input Low Voltage | |
| VIL(AC)_RESET AC Input Low Voltage | |
| TR_RESET Rising time | |
| tPW_RESET RESET pulse width | |
| VIHDiffPeak VIH.DIFF.Peak Voltage (DQS) | |
| VILDiffPeak VIL.DIFF.Peak Voltage (DQS) | |
| Vix_DQS_ratio DQS_t and DQS_c crossing relative to midpoint | |
| VDQSmid_to_Vcent VDQSmid offset relative to Vcent_DQ(midpoint) | |
| VIHDiff_DQS Differential Input High | |
| VILDiff_DQS Differential Input Low | |
| SRIdiff Differential Input Slew Rate (DQS) | |
| VOH(DC) DC output high measurement level (for IV curve linearity) | |
| VOM(DC) DC output mid measurement level (for IV curve linearity) | |
| VOL(DC) DC output low measurement level (for IV curve linearity) | |
| VOH(AC) AC output high measurement level (for output SR) | |
| VOL(AC) AC output low measurement level (for output SR) | |
| VOHdiff(AC) AC differential output high measurement level (for output SR) | |
| VOLdiff(AC) AC differential output low measurement level (for output SR) | |
| SRQse Single ended output slew rate | |
| SRQdiff Differential output slew rate | |
| VOH(DC) DC output high measurement level (Connectivity Test Mode) | |
| VOM(DC) DC output mid measurement level (Connectivity Test Mode) | |
| VOL(DC) DC output low measurement level (Connectivity Test Mode) | |
| VOB(DC) DC output below measurement level (Connectivity Test Mode) | |
| VOH(AC) AC output high measurement level (Connectivity Test Mode) | |
| VOL(AC) AC output below measurement level (Connectivity Test Mode) | |
| TF_output_CT Output signal Falling time (Connectivity Test Mode) | |
| TR_output_CT Output signal Rising time (Connectivity Test Mode) | |
| Absolute Specification - VDDQ = VDD | |
| Absolute Specification - VPP | |
| Speed Bin table validity condition | |
| Speed Bin table values condition | |
| tAA min (Internal read command to first data) | |
| tAA max (Internal read command to first data) | |
| tRCD min (ACT to internal read or write delay time) | |
| tRP min (PRE command period) | |
| tRAS min (ACT to PRE command period) | |
| tRC min (ACT to ACT or REF command period) | |
| Supported CL Settings | |
| Supported CL Settings with read DBI | |
| Supported CWL Settings | |
| CL | |
| CWL | |
| nRCD | |
| nRC | |
| nRAS | |
| nRP | |
| tCCD_S | |
| tCCD_L | |
| tWTR_S | |
| tWTR_L | |
| nRFC 2Gb | |
| nRFC 4Gb | |
| nRFC 8Gb | |
| nRFC 16Gb | |
| nFAW (x4) | |
| nFAW (x8) | |
| nFAW (x16) | |
| nRRDS (x4) | |
| nRRDS (x8) | |
| nRRDS (x16) | |
| nRRDL (x4) | |
| nRRDL (x8) | |
| nRRDL (x16) | |
| IDD measurement initialization: RON (Output Driver Impedance) | |
| IDD measurement initialization: RTT_NOM | |
| IDD measurement initialization: RTT_WR | |
| IDD measurement initialization: RTT_PARK | |
| IDD measurement initialization: Qoff | |
| Measurement condition symbol: IDD0 | |
| Measurement condition symbol: IDD0A | |
| Measurement condition symbol: IPP0 | |
| Measurement condition symbol: IDD1 | |
| Measurement condition symbol: IDD1A | |
| Measurement condition symbol: IPP1 | |
| Measurement condition symbol: IDD2N | |
| Measurement condition symbol: IDD2NA | |
| Measurement condition symbol: IPP2N | |
| Measurement condition symbol: IDD2NT | |
| Measurement condition symbol: IDDQ2NT (Optional) | |
| Measurement condition symbol: IDD2NL | |
| Measurement condition symbol: IDD2NG | |
| Measurement condition symbol: IDD2ND | |
| Measurement condition symbol: IDD2N_par | |
| Measurement condition symbol: IDD2P | |
| Measurement condition symbol: IPP2P | |
| Measurement condition symbol: IDD2Q | |
| Measurement condition symbol: IDD3N | |
| Measurement condition symbol: IDD3NA | |
| Measurement condition symbol: IPP3N | |
| Measurement condition symbol: IDD3P | |
| Measurement condition symbol: IPP3P | |
| Measurement condition symbol: IDD4R | |
| Measurement condition symbol: IDD4RA | |
| Measurement condition symbol: IDD4RB | |
| Measurement condition symbol: IPP4R | |
| Measurement condition symbol: IDDQ4R (Optional) | |
| Measurement condition symbol: IDDQ4RB (Optional) | |
| Measurement condition symbol: IDD4W | |
| Measurement condition symbol: IDD4WA | |
| Measurement condition symbol: IDD4WB | |
| Measurement condition symbol: IDD4WC | |
| Measurement condition symbol: IDD4W_par | |
| Measurement condition symbol: IPP4W | |
| Measurement condition symbol: IDD5B | |
| Measurement condition symbol: IPP5B | |
| Measurement condition symbol: IDD5F2 | |
| Measurement condition symbol: IPP5F2 | |
| Measurement condition symbol: IDD5F4 | |
| Measurement condition symbol: IPP5F4 | |
| Measurement condition symbol: IDD6N | |
| Measurement condition symbol: IPP6N | |
| Measurement condition symbol: IDD6E | |
| Measurement condition symbol: IPP6E | |
| Measurement condition symbol: IDD6R | |
| Measurement condition symbol: IPP6R | |
| Measurement condition symbol: IDD6A | |
| Measurement condition symbol: IPP6A | |
| Measurement condition symbol: IDD7 | |
| Measurement condition symbol: IPP7 | |
| Measurement condition symbol: IDD8 | |
| Measurement condition symbol: IPP8 | |
| Note 1 - Burst Length | |
| Note 2 - Output Buffer Enable | |
| Note 3 - CAL enabled | |
| Note 4 - Low Power Array Self Refresh (LP ASR) | |
| Note 5 - IDD2NG | |
| IDD4RB | |
| IDD4WB | |
| IPP5B | |
| Density / Organization | |
| Mechanical dimensional diagram title | |
| Overall module length (outer) | |
| Overall module length (inner / contact span) | |
| Lower edge / notch height | |
| PCB thickness | |
| Front lower span dimension (left segment) | |
| Front lower span dimension (right segment) | |
| Detail E dimension | |
| Detail E dimension (toleranced) | |
| Contact / detail dimension | |
| Back view height | |
| Side view PCB thickness | |
| Side view max overall thickness | |
| General dimensional tolerance | |
| Units of measurement | |
| Note 1 (tolerance statement) | |
| Note 2 (reference-only statement) | |
| Detail A corner radius | |
| Detail A dimension | |
| Component placement region | |
| Detail B dimension | |
| Detail of Contacts A,F dimension | |
| Detail of Contacts A,F dimension (toleranced) | |
| Detail of Contacts E dimension (toleranced) | |
| Detail of Contacts E dimension | |
| Detail of Contacts B dimension | |
| Detail of Contacts B pin callout | |
| Detail of Contacts C dimension | |
| Detail of Contacts C pin callout | |
| Detail of Contacts D dimension | |
| Detail of Contacts D dimension (toleranced) | |
| Non-metalized keep out area note | |
| Keep out area max dimension | |
| Detail F dimension | |
| Page number | |
| DRAM die basis | |
| Disclaimer | |
| Organization | |
| Intended use | |
| Power Supply VDD | |
| Standards compliance | |
| Bank Grouping | |
| Data Strobe | |
| Burst Length | |
| On-Die Termination | |
| RoHS compliance | |
| Per DRAM Addressability | |
| Internal Vref DQ level generation | |
| DBI (Data Bus Inversion) | |
| CA parity mode | |
| Revision | |
| Pin 1 (Front Side) | |
| Pin 2 (Front Side) | |
| Pin 3 (Front Side) | |
| Pin 4 (Front Side) | |
| Pin 5 (Front Side) | |
| Pin 6 (Front Side) | |
| Pin 7 (Front Side) | |
| Pin 8 (Front Side) | |
| Pin 9 (Front Side) | |
| Pin 10 (Front Side) | |
| Pin 11 (Front Side) | |
| Pin 12 (Front Side) | |
| Pin 13 (Front Side) | |
| Pin 14 (Front Side) | |
| Pin 15 (Front Side) | |
| Pin 16 (Front Side) | |
| Pin 17 (Front Side) | |
| Pin 18 (Front Side) | |
| Pin 19 (Front Side) | |
| Pin 20 (Front Side) | |
| Pin 21 (Front Side) | |
| Pin 22 (Front Side) | |
| Pin 23 (Front Side) | |
| Pin 24 (Front Side) | |
| Pin 25 (Front Side) | |
| Pin 26 (Front Side) | |
| Pin 27 (Front Side) | |
| Pin 28 (Front Side) | |
| Pin 29 (Front Side) | |
| Pin 30 (Front Side) | |
| Pin 31 (Front Side) | |
| Pin 32 (Front Side) | |
| Pin 33 (Front Side) | |
| Pin 34 (Front Side) | |
| Pin 35 (Front Side) | |
| Pin 36 (Front Side) | |
| Pin 145 (Back Side) | |
| Pin 146 (Back Side) | |
| Pin 147 (Back Side) | |
| Pin 148 (Back Side) | |
| Pin 149 (Back Side) | |
| Pin 150 (Back Side) | |
| Pin 151 (Back Side) | |
| Pin 152 (Back Side) | |
| Pin 153 (Back Side) | |
| Pin 154 (Back Side) | |
| Pin 155 (Back Side) | |
| Pin 156 (Back Side) | |
| Pin 157 (Back Side) | |
| Pin 158 (Back Side) | |
| Pin 159 (Back Side) | |
| Pin 160 (Back Side) | |
| Pin 161 (Back Side) | |
| Pin 162 (Back Side) | |
| Pin 163 (Back Side) | |
| Pin 164 (Back Side) | |
| Pin 165 (Back Side) | |
| Pin 166 (Back Side) | |
| Pin 167 (Back Side) | |
| Pin 168 (Back Side) | |
| Pin 169 (Back Side) | |
| Pin 170 (Back Side) | |
| Pin 171 (Back Side) | |
| Pin 172 (Back Side) | |
| Pin 173 (Back Side) | |
| Pin 174 (Back Side) | |
| Pin 175 (Back Side) | |
| Pin 176 (Back Side) | |
| Pin 177 (Back Side) | |
| Pin 178 (Back Side) | |
| Pin 179 (Back Side) | |
| Pin 180 (Back Side) | |
| Pin 74 (Front Side) | |
| Pin 75 (Front Side) | |
| Pin 76 (Front Side) | |
| Pin 77 (Front Side) | |
| Pin 78 (Front Side) | |
| Pin 79 (Front Side) | |
| Pin 80 (Front Side) | |
| Pin 81 (Front Side) | |
| Pin 82 (Front Side) | |
| Pin 83 (Front Side) | |
| Pin 84 (Front Side) | |
| Pin 85 (Front Side) | |
| Pin 86 (Front Side) | |
| Pin 87 (Front Side) | |
| Pin 88 (Front Side) | |
| Pin 89 (Front Side) | |
| Pin 90 (Front Side) | |
| Pin 91 (Front Side) | |
| Pin 92 (Front Side) | |
| Pin 93 (Front Side) | |
| Pin 94 (Front Side) | |
| Pin 95 (Front Side) | |
| Pin 96 (Front Side) | |
| Pin 97 (Front Side) | |
| Pin 98 (Front Side) | |
| Pin 99 (Front Side) | |
| Pin 100 (Front Side) | |
| Pin 101 (Front Side) | |
| Pin 102 (Front Side) | |
| Pin 103 (Front Side) | |
| Pin 104 (Front Side) | |
| Pin 105 (Front Side) | |
| Pin 106 (Front Side) | |
| Pin 107 (Front Side) | |
| Pin 218 (Back Side) | |
| Pin 219 (Back Side) | |
| Pin 220 (Back Side) | |
| Pin 221 (Back Side) | |
| Pin 222 (Back Side) | |
| Pin 223 (Back Side) | |
| Pin 224 (Back Side) | |
| Pin 225 (Back Side) | |
| Pin 226 (Back Side) | |
| Pin 227 (Back Side) | |
| Pin 228 (Back Side) | |
| Pin 229 (Back Side) | |
| Pin 230 (Back Side) | |
| Pin 231 (Back Side) | |
| Pin 232 (Back Side) | |
| Pin 233 (Back Side) | |
| Pin 234 (Back Side) | |
| Pin 235 (Back Side) | |
| Pin 236 (Back Side) | |
| Pin 237 (Back Side) | |
| Pin 238 (Back Side) | |
| Pin 239 (Back Side) | |
| Pin 240 (Back Side) | |
| Pin 241 (Back Side) | |
| Pin 242 (Back Side) | |
| Pin 243 (Back Side) | |
| Pin 244 (Back Side) | |
| Pin 245 (Back Side) | |
| Pin 246 (Back Side) | |
| Pin 247 (Back Side) | |
| Pin 248 (Back Side) | |
| Pin 249 (Back Side) | |
| Pin 250 (Back Side) | |
| Pin 251 (Back Side) | |
| Pin 37 (Front Side) | |
| Pin 38 (Front Side) | |
| Pin 39 (Front Side) | |
| Pin 40 (Front Side) | |
| Pin 41 (Front Side) | |
| Pin 42 (Front Side) | |
| Pin 43 (Front Side) | |
| Pin 44 (Front Side) | |
| Pin 45 (Front Side) | |
| Pin 46 (Front Side) | |
| Pin 47 (Front Side) | |
| Pin 48 (Front Side) | |
| Pin 49 (Front Side) | |
| Pin 50 (Front Side) | |
| Pin 51 (Front Side) | |
| Pin 52 (Front Side) | |
| Pin 53 (Front Side) | |
| Pin 54 (Front Side) | |
| Pin 55 (Front Side) | |
| Pin 56 (Front Side) | |
| Pin 57 (Front Side) | |
| Pin 58 (Front Side) | |
| Pin 59 (Front Side) | |
| Pin 60 (Front Side) | |
| Pin 61 (Front Side) | |
| Pin 62 (Front Side) | |
| Pin 63 (Front Side) | |
| Pin 64 (Front Side) | |
| Pin 65 (Front Side) | |
| Pin 66 (Front Side) | |
| Pin 67 (Front Side) | |
| Pin 68 (Front Side) | |
| Pin 69 (Front Side) | |
| Pin 70 (Front Side) | |
| Pin 71 (Front Side) | |
| Pin 72 (Front Side) | |
| Pin 73 (Front Side) | |
| Pin 181 (Back Side) | |
| Pin 182 (Back Side) | |
| Pin 183 (Back Side) | |
| Pin 184 (Back Side) | |
| Pin 185 (Back Side) | |
| Pin 186 (Back Side) | |
| Pin 187 (Back Side) | |
| Pin 188 (Back Side) | |
| Pin 189 (Back Side) | |
| Pin 190 (Back Side) | |
| Pin 191 (Back Side) | |
| Pin 192 (Back Side) | |
| Pin 193 (Back Side) | |
| Pin 194 (Back Side) | |
| Pin 195 (Back Side) | |
| Pin 196 (Back Side) | |
| Pin 197 (Back Side) | |
| Pin 198 (Back Side) | |
| Pin 199 (Back Side) | |
| Pin 200 (Back Side) | |
| Pin 201 (Back Side) | |
| Pin 202 (Back Side) | |
| Pin 203 (Back Side) | |
| Pin 204 (Back Side) | |
| Pin 205 (Back Side) | |
| Pin 206 (Back Side) | |
| Pin 207 (Back Side) | |
| Pin 208 (Back Side) | |
| Pin 209 (Back Side) | |
| Pin 210 (Back Side) | |
| Pin 211 (Back Side) | |
| Pin 212 (Back Side) | |
| Pin 213 (Back Side) | |
| Pin 214 (Back Side) | |
| Pin 215 (Back Side) | |
| Pin 216 (Back Side) | |
| Pin 217 (Back Side) | |
| Pin 108 (Front Side) | |
| Pin 109 (Front Side) | |
| Pin 110 (Front Side) | |
| Pin 111 (Front Side) | |
| Pin 112 (Front Side) | |
| Pin 113 (Front Side) | |
| Pin 114 (Front Side) | |
| Pin 115 (Front Side) | |
| Pin 116 (Front Side) | |
| Pin 117 (Front Side) | |
| Pin 118 (Front Side) | |
| Pin 119 (Front Side) | |
| Pin 120 (Front Side) | |
| Pin 121 (Front Side) | |
| Pin 122 (Front Side) | |
| Pin 123 (Front Side) | |
| Pin 124 (Front Side) | |
| Pin 125 (Front Side) | |
| Pin 126 (Front Side) | |
| Pin 127 (Front Side) | |
| Pin 128 (Front Side) | |
| Pin 129 (Front Side) | |
| Pin 130 (Front Side) | |
| Pin 131 (Front Side) | |
| Pin 132 (Front Side) | |
| Pin 133 (Front Side) | |
| Pin 134 (Front Side) | |
| Pin 135 (Front Side) | |
| Pin 136 (Front Side) | |
| Pin 137 (Front Side) | |
| Pin 138 (Front Side) | |
| Pin 139 (Front Side) | |
| Pin 140 (Front Side) | |
| Pin 141 (Front Side) | |
| Pin 142 (Front Side) | |
| Pin 143 (Front Side) | |
| Pin 144 (Front Side) | |
| Pin 252 (Back Side) | |
| Pin 253 (Back Side) | |
| Pin 254 (Back Side) | |
| Pin 255 (Back Side) | |
| Pin 256 (Back Side) | |
| Pin 257 (Back Side) | |
| Pin 258 (Back Side) | |
| Pin 259 (Back Side) | |
| Pin 260 (Back Side) | |
| Pin 261 (Back Side) | |
| Pin 262 (Back Side) | |
| Pin 263 (Back Side) | |
| Pin 264 (Back Side) | |
| Pin 265 (Back Side) | |
| Pin 266 (Back Side) | |
| Pin 267 (Back Side) | |
| Pin 268 (Back Side) | |
| Pin 269 (Back Side) | |
| Pin 270 (Back Side) | |
| Pin 271 (Back Side) | |
| Pin 272 (Back Side) | |
| Pin 273 (Back Side) | |
| Pin 274 (Back Side) | |
| Pin 275 (Back Side) | |
| Pin 276 (Back Side) | |
| Pin 277 (Back Side) | |
| Pin 278 (Back Side) | |
| Pin 279 (Back Side) | |
| Pin 280 (Back Side) | |
| Pin 281 (Back Side) | |
| Pin 282 (Back Side) | |
| Pin 283 (Back Side) | |
| Pin 284 (Back Side) | |
| Pin 285 (Back Side) | |
| Pin 286 (Back Side) | |
| Pin 287 (Back Side) | |
| Pin 288 (Back Side) | |
| Key (notch) position | |
| Address/Command/Control Overshoot: Maximum peak amplitude above VDD Absolute Max allowed for overshoot area | |
| Address/Command/Control Overshoot: Delta value between VDD Absolute Max and VDD Max allowed for overshoot area | |
| Address/Command/Control Undershoot: Maximum peak amplitude allowed for undershoot area | |
| Address/Command/Control: Maximum overshoot area per 1tCK Above Absolute Max | |
| Address/Command/Control: Maximum overshoot area per 1tCK Between Absolute Max | |
| Address/Command/Control: Maximum undershoot area per 1tCK Below VSS | |
| Clock Overshoot: Maximum peak amplitude above VDD Absolute Max allowed for overshoot area | |
| Clock Overshoot: Delta value between VDD Absolute Max and VDD Max allowed for overshoot area | |
| Clock Undershoot: Maximum peak amplitude allowed for undershoot area | |
| Clock: Maximum overshoot area per 1UI Above Absolute Max | |
| Clock: Maximum overshoot area per 1UI Between Absolute Max | |
| Clock: Maximum undershoot area per 1UI Below VSS | |
| Data/Strobe/Mask Overshoot: Maximum peak amplitude above Max absolute level of Vin,Vout | |
| Data/Strobe/Mask: Overshoot area Between Max Absolute level of Vin,Vout and VDDQ Max | |
| Data/Strobe/Mask: Undershoot area Between Min absolute level of Vin,Vout and VDDQ Max | |
| Data/Strobe/Mask: Maximum peak amplitude below Min absolute level of Vin,Vout | |
| Data/Strobe/Mask: Maximum overshoot area per 1UI Above Max absolute level of Vin,Vout | |
| Data/Strobe/Mask: Maximum overshoot area per 1UI Between Max absolute level of Vin,Vout and VDDQ Max | |
| Data/Strobe/Mask: Maximum undershoot area per 1UI Between Min absolute level of Vin,Vout and VSSQ | |
| Data/Strobe/Mask: Maximum undershoot area per 1UI Below Min absolute level of Vin,Vout | |
| VDDQ = VDD | |
| DLL condition | |
| Geardown validity | |
| tAA (min) | |
| tAA (max) | |
| tAA_DBI (min) | |
| tAA_DBI (max) | |
| tRCD (min) | |
| tRCD (max) | |
| tRP (min) | |
| tRP (max) | |
| tRAS (min) | |
| tRAS (max) | |
| tRC (min) | |
| tRC (max) | |
| nFAW x4 | |
| nFAW x8 | |
| nFAW x16 | |
| nRRDS x4 | |
| nRRDS x8 | |
| nRRDS x16 | |
| nRRDL x4 | |
| nRRDL x8 | |
| nRRDL x16 | |
| Front overall width (outer) | |
| Front PCB width (inner) | |
| Left edge offset | |
| Module height (top to step) | |
| Lower height dimension | |
| Front contact/pad height dimension | |
| Front left lower width segment | |
| Front right lower width segment | |
| Lower edge offset / notch height | |
| Back overall height | |
| Pin step / chamfer dimension (back) | |
| Module thickness (PCB) | |
| Max module thickness | |
| Edge corner radius (Detail A) | |
| Edge fillet radius (Detail A) | |
| Pin 1 callout | |
| Pin 35 callout | |
| Pin 47 callout | |
| Pin 105 callout | |
| Pin 117 callout | |
| Detail dimension | |
| Registering Clock Driver callout | |
| SPD/TS callout | |
| Contact A,F width dimension | |
| Contact A,F thickness | |
| Contact E dimension | |
| Contact B dimension | |
| Contact B Pin 35 callout | |
| Contact B Pin 47 callout | |
| Contact C dimension | |
| Contact C Pin 117 callout | |
| Contact C Pin 105 callout | |
| Contact D dimension | |
| Contact D width dimension | |
| Contact D thickness | |
| Non-metalized keep out area (Detail D) | |
| Keep out max dimension (Detail D) | |
| Non-metalized keep out area (Contacts C/D area) | |
| Keep out max dimension (second) | |
| Dimensional tolerance note | |
| Reference-only note | |
| Product family / configuration | |
| DRAM die base | |
| Compliance | |
| Internal Vref DQ | |
| DBI | |
| VDD core power supply | |
| VPP SDRAM activating power supply | |
| VTT termination power supply | |
| 12V supply usage | |
| VDDSPD supply | |
| VREFCA reference voltage | |
| VDD for PC4 | |
| Data bus width | |
| ECC check bits | |
| Diagram title (page 1) | |
| Diagram title (page 2) | |
| Number of SDRAMs (per module) | |
| CK0_t, CK0_c termination resistor | |
| CK1_t, CK1_c termination resistor | |
| Default resistor value (page1) | |
| Default resistor value (page2) | |
| Resistor cross-reference (page2) | |
| CKE1B routing | |
| CKE1A routing | |
| CKE0B routing | |
| CKE0A routing | |
| ODT1B routing | |
| ODT1A routing | |
| ODT0B routing | |
| ODT0A routing | |
| CS1B_n routing | |
| CS1A_n routing | |
| CS0B_n routing | |
| CS0A_n routing | |
| ALERT_n routing | |
| RESET_n routing | |
| BG[1:0]A routing | |
| BG[1:0]B routing | |
| BA[1:0]A routing (first) | |
| BA[1:0]A routing (second) | |
| A[17:0]B routing | |
| A[17:0]A routing | |
| PARB routing | |
| PARA routing | |
| ACTB_n routing | |
| ACTA_n routing | |
| Y0_t clock routing | |
| Y1_t clock routing | |
| Y2_t clock routing | |
| Y3_t clock routing | |
| Y0_c clock routing | |
| Y1_c clock routing | |
| Y2_c clock routing | |
| Y3_c clock routing | |
| Data byte DQS0 mapping | |
| Data byte DQS2 mapping | |
| Data byte DQS3 mapping | |
| Data byte DQS4 mapping | |
| Data byte DQS5 mapping | |
| Data byte DQS6 mapping | |
| Data byte DQS7 mapping | |
| Check-bit byte DQS8 mapping | |
| DBI/DM mapping byte 0 | |
| DBI/DM mapping byte 8 (check-bit) | |
| Power rails to SDRAMs | |
| SPD device | |
| SPD I2C signals | |
| SPD pull-up resistor | |
| VIN, VOUT | |
| TSTG Storage Temperature | |
| TOPER Normal Operating Temperature Range | |
| Extended Temperature Range | |
| VDDQ Supply Voltage for Output | |
| VPP Supply Voltage for DRAM Activating | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate > 4.0 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 4.0 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 3.0 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 2.0 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 1.8 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 1.6 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 1.4 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 1.2 V/ns) | |
| tDVAC @ |VIH/Ldiff(AC)|=200mV (Slew Rate 1.0 V/ns) | |
| Maximum peak amplitude above VDD Absolute Max allowed for overshoot area | |
| Delta value between VDD Absolute Max and VDD Max allowed for overshoot area | |
| Maximum peak amplitude allowed for undershoot area | |
| Maximum overshoot area per 1tCK Above Absolute Max | |
| Maximum overshoot area per 1tCK Between Absolute Max | |
| Maximum undershoot area per 1tCK Below VSS | |
| Clock: Maximum peak amplitude above VDD Absolute Max allowed for overshoot area | |
| Clock: Delta value between VDD Absolute Max and VDD Max allowed for overshoot area | |
| Clock: Maximum peak amplitude allowed for undershoot area | |
| Data/Strobe/Mask: Maximum peak amplitude above Max absolute level of Vin,Vout | |
| AC Input High Voltage VIH(AC)_RESET | |
| DC Input High Voltage VIH(DC)_RESET | |
| DC Input Low Voltage VIL(DC)_RESET | |
| AC Input Low Voltage VIL(AC)_RESET | |
| Rising time TR_RESET | |
| RESET pulse width tPW_RESET | |
| VIHDiffPeak VIH.DIFF.Peak Voltage | |
| VILDiffPeak VIL.DIFF.Peak Voltage | |
| SRIdiff Differential Input Slew Rate | |
| VOH(DC) DC output high measurement level | |
| VOM(DC) DC output mid measurement level | |
| VOL(DC) DC output low measurement level | |
| VOH(AC) AC output high measurement level | |
| VOL(AC) AC output low measurement level | |
| VOHdiff(AC) AC differential output high measurement level | |
| VOLdiff(AC) AC differential output low measurement level | |
| CT Mode VOH(DC) DC output high measurement level | |
| CT Mode VOM(DC) DC output mid measurement level | |
| CT Mode VOL(DC) DC output low measurement level | |
| CT Mode VOB(DC) DC output below measurement level | |
| CT Mode VOH(AC) AC output high measurement level | |
| CT Mode VOL(AC) AC output below measurement level | |
| CT Mode TF_output_CT Output signal Falling time | |
| CT Mode TR_output_CT Output signal Rising time | |
| Speed bin tables applicability | |
| Module configuration | |
| Dimension units | |
| Front overall length (outer) | |
| Front length | |
| Front left edge dimension | |
| Front segment dimension (Detail A side) | |
| Front segment dimension (Detail F side) | |
| Front top tab dimension | |
| Front notch/feature dimension | |
| Front feature dimension | |
| Back overall height dimension | |
| Back feature dimension | |
| Side thickness | |
| Side max thickness | |
| Default dimensional tolerance | |
| Drawing disclaimer | |
| Detail E corner radius | |
| Pin marker | |
| Component label | |
| Contact A,F pad width | |
| Contact A,F pad dimension | |
| Contact D pad width | |
| Contact D pad dimension | |
| Contact D non-metalized keep-out | |
| Contact D keep-out max dimension | |
| Detail A label | |
| Detail B label | |
| Detail C label | |
| Detail D label | |
| Interface | |
| Module density / organization | |
| Absolute Specification VDDQ = VDD | |
| Absolute Specification VPP | |
| Speed bin table validity condition | |
| IDD measurement init RON | |
| Front overall width (overall) | |
| Front width (PCB / inner) | |
| Dimension 2.10 | |
| Dimension 3.00 | |
| Width 64.60 | |
| Width 56.10 | |
| Notch/offset dimension 2.70 | |
| Height 30.75 | |
| Height 17.10 | |
| Back height 31.25 | |
| Side thickness (PCB) | |
| Tolerance note | |
| Note 1 text | |
| Note 2 text | |
| Detail A radius | |
| Detail A dimension 14.10 | |
| Detail A dimension 3.00 | |
| Pin callout | |
| Component callout | |
| Detail B dimension 8.00 | |
| Detail B dimension 11.00 | |
| Contacts A,F detail 0.85 | |
| Contacts A,F detail 0.60 | |
| Contacts A,F detail 1.50 | |
| Contacts A,F detail 0.2 | |
| Contacts A,F detail 0.20 | |
| Contacts A,F detail 5.95 | |
| Contacts A,F detail 3.85 | |
| Contacts A,F detail 4.30 | |
| Contacts E detail 2.10 | |
| Contacts E detail 2.60 | |
| Contacts E detail 9.35 | |
| Contacts E detail 10.20 | |
| Contacts B detail Pin 35 | |
| Contacts B detail Pin 47 | |
| Contacts B detail 2.10 | |
| Contacts B detail 2.60 | |
| Contacts B detail 9.35 | |
| Contacts B detail 10.20 | |
| Contacts C detail Pin 117 | |
| Contacts C detail Pin 105 | |
| Contacts C detail 2.10 | |
| Keep-out area note | |
| Keep-out Max 0.30 | |
| Keep-out Max 0.35 | |
| Keep-out Max 0.25 | |
| Contacts D detail 0.85 | |
| Contacts D detail 0.60 | |
| Detail F label | |
| Based On | |
| Document Date | |
| module_organization | |
| rank | |
| sdram_width | |
| ck0_termination_resistor | |
| ck1_termination_resistor | |
| default_resistor_value | |
| data_bus_resistor_value | |
| zq_resistor_value | |
| DDR4 device-level electrical specifications (Absolute Maximum Ratings, Recommended DC Operating Conditions, AC/DC input & output measurement levels, overshoot/undershoot, slew rates, RESET_n CMOS levels) — pages 18-43 | |
| Shared device-level specification reference | |
| Module density | |
| Dimensional units | |
| Module length (overall) | |
| Module length (PCB) | |
| Module height (overall) | |
| Module height (PCB) | |
| Height to notch / feature | |
| Contact pitch / dimension | |
| Front-view segment length | |
| Detail E callout | |
| Module thickness (Side) | |
| Module thickness max (Side) | |
| Pin reference | |
| Detail B/D height dimension | |
| Contacts A,F dimension | |
| Contacts E dimension | |
| Contacts B dimension | |
| Contacts B pin span | |
| Contacts C dimension | |
| Contacts C pin span | |
| Contacts D dimension | |
| Contacts D non-metalized keep-out | |
| Contacts D keep-out dimension | |
| Contacts A non-metalized keep-out | |
| Contacts A keep-out dimension |
